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Patent Searching and Data


Title:
SYNCHRONIZATION DETECTING CIRCUIT
Document Type and Number:
Japanese Patent JPH06252649
Kind Code:
A
Abstract:

PURPOSE: To obtain a synchronization detection circuit in which a signal from a detector is branched, one branched signal is subject to amplitude limit and the resulting signals are multiplied so as to eliminate distortion due to phase fluctuation of the signal.

CONSTITUTION: A detector 1 detects an AM modulation signal 7 and an amplifier 2 amplifies an output signal 8 of the detector 1. A limiter circuit 3 applies amplitude limit to an output signal 10 of the amplifier 2 and a delay circuit 4 corrects the delay by the amplifier 2 and a delay by the limiter circuit 3 and then a propagation delay. A multiplier 5 multiplies the output signal 1 of the limiter circuit 3 and an output signal 9 of the delay circuit 4 and a low pass filter 6 applies band limit to an output signal 12 of the multiplier 5.


Inventors:
TAKEDA TOSHIYUKI
Application Number:
JP6119293A
Publication Date:
September 09, 1994
Filing Date:
February 25, 1993
Export Citation:
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Assignee:
ANDO ELECTRIC
International Classes:
H03D1/04; H03D1/06; H03D1/22; (IPC1-7): H03D1/22; H03D1/04