Title:
SYNCHRONIZED SLICER
Document Type and Number:
Japanese Patent JPS62143594
Kind Code:
A
Abstract:
Apparatus for ascertaining the time of occurrence of passage of the leading and trailing edges of an input pulse through the 50% amplitude level provides the transfer function 1 - cosine wt where t is equal to the round trip delay through a delay line, and w is the angular velocity of each fourier component of the input signal. In one embodiment, a summing resistor (20) and a delay line (22) having a characteristic impedance equal to that of the resistor are used. The output of the delay line is coupled to one input of a comparator (53), and the other input is coupled to the junction between the summing resistor and the delay line.
More Like This:
Inventors:
MORRISON ERIC FRASER (US)
Application Number:
JP24114086A
Publication Date:
June 26, 1987
Filing Date:
October 09, 1986
Export Citation:
Assignee:
AMPEX
International Classes:
G01R19/175; H04N9/89; H04N5/08; (IPC1-7): H04N9/89
Attorney, Agent or Firm:
Kazuto Izumi