Title:
SYNCHRONIZING SEPARATION CIRCUIT
Document Type and Number:
Japanese Patent JP3321842
Kind Code:
B2
Abstract:
PURPOSE: To provide the synchronizing separation circuit capable of obtaining a more stable synchronizing signal without being affected by external disturbance such as noise or dropout.
CONSTITUTION: An asynchronous clamp circuit 1 clamps an input video signal and a pulse is obtained by slicing the signal at a 1st synchronizing separation circuit 2. When the pulse width of the pulse is within a prescribed range, a synchronization detection circuit 3 discriminates it as a synchronizing signal and a clamp pulse generating circuit 4 generates a clamp pulse based on an edge of a synchronizing signal. Then a synchronization clamp circuit 5 is worked by the clamp pulse to obtain a video signal of a stable blanking level. Synchronizing separation is performed from the video signal by a 2nd synchronizing separation circuit 6.
Inventors:
Hideki Chiba
Application Number:
JP24550892A
Publication Date:
September 09, 2002
Filing Date:
August 21, 1992
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H04N5/08; H04N5/18; (IPC1-7): H04N5/08; H04N5/18
Domestic Patent References:
| JP1274567A |
Attorney, Agent or Firm:
Kuninori Funabashi