PURPOSE: To obtain stably a phase difference output, by resetting a VCO by an edge pulse of a PCM signal in a PLL outputting a synchronizing signal synchronized with the PCM signal.

CONSTITUTION: A PCM signal (a) is inputted to an edge detecting circuit 7 and an edge pulse (e) with narrow pulse width is formed at the edge part of the PCM signal (a) and inputted to a phase comparing circuit 8. On the other hand, a synchronizing signal (b) generated from the VCO10 is inputted to a sawtooth wave generating circuit 11 and a converted sawtooth wave (f) is inputted to the phase comparing circuit 8. The phae comparing circuit 8 samples the sawtooth wave signal (f) by the edge pulse (e). The sampled signal (g) corresponding to the phase difference is passed through an LPF9 to be smoothed and outputted as a control signal for the VCO10. A signal line (h) resets the VCO10 by the edge pulse (e) to return the output of the VCO10 to a prescribed phase.