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Title:
SYNCHRONIZING SIGNAL LEAD CONNECTION SYSTEM
Document Type and Number:
Japanese Patent JPS5451426
Kind Code:
A
Abstract:

PURPOSE: To make easy the reception control, to promote high speed connection and to restrict the increase in the number of signal lines and the amount of interface hardware, by absorbing the difference in speed due to the difference of the distadnce between units.

CONSTITUTION: The data synchronizing signal line DSYCo-n is provided with each memory unit Mo to Mn and it is made lead connection with the central processing unit CC. Ahead the read-in data RD, the data synchronizing signal DSYC is delivered to CC, which opens the gate after rceiving DSYC and receives RD depending on the time delay due to the difference in the distance between units. Next, to make highly dense the unit connection system and to reduce the amount of hardware , the read-in signal line and the write-in signal line are made common and bidirectional delivery is made. That is, the address signal line AD of common connection, and the read-in and write-in data lines RD/WD of common connection are provided


Inventors:
TAGAMI MASATERU
KAWANOBE TADASHI
KAWASHIMA YOUICHI
NAKANO YOSHIO
SUEMORI NOBORU
Application Number:
JP11741977A
Publication Date:
April 23, 1979
Filing Date:
September 30, 1977
Export Citation:
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Assignee:
FUJITSU LTD
NIPPON TELEGRAPH & TELEPHONE
OKI ELECTRIC IND CO LTD
NIPPON ELECTRIC CO
HITACHI LTD
International Classes:
G06F13/16; G06F3/00; G06F12/06; G06F13/00; (IPC1-7): G06F3/00; G06F13/00
Domestic Patent References:
JPS50108845A1975-08-27
JPS5017146A1975-02-22



 
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