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Title:
SYNCHRONIZING SYSTEM OF DOUBLED STRUCTURE STORAGE DEVICE
Document Type and Number:
Japanese Patent JPS5783862
Kind Code:
A
Abstract:

PURPOSE: To assure a synchronous working for a double structure processor operates a synchronously, by sending an access answer signal to a processor after the access response signal is delivered to the processor from an access priority conflicting circuit.

CONSTITUTION: An access request given from a doubled structure processor 10 including processors 11 and 12 is detected by access request detecting circuits 50 and 80 respectively. Then an access response to the processor 10 is sent back from access response send-back circuits 30 and 60 respectively. In this case, the circuits 50 and 80 detect the access request from the processor 10 by both systems 21 and 22 respectively of a doubled structure storage device 20. This detection signal is transmitted to the circuits 30 and 60 of own system and another system respectively. Then the access response signal is sent back to the processor 10 after the access response signal is delivered to the processor 10 from access priority conflicting circuit 40 and 70 respectively.


Inventors:
FUNASHIGE HIROSHI
SHIMOMUKAI KOUICHI
Application Number:
JP15978780A
Publication Date:
May 25, 1982
Filing Date:
November 13, 1980
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F15/16; G06F9/52; G06F12/16; G06F13/18; G06F15/177; (IPC1-7): G06F13/00; G06F15/16