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Title:
SYNCHRONIZING SYSTEM
Document Type and Number:
Japanese Patent JPS60128735
Kind Code:
A
Abstract:

PURPOSE: To establish always synchronism with the best synchronizing signal even in a line where momentarily changing fading, radio interference, etc. exist, by establishing synchronism with a subchannel having the least error at a decoding time in the frequency multiplex communication system.

CONSTITUTION: A synchronizing signal (bit and frame) generated from a synchronizing signal generator 1 is transmitted before data transmission, and data is transmitted following this signal. These signals are encoded by an encoder 2 and are modulated to frequencies f1∼fn by a modulator 3 and are transmitted from a transmitter 4. Signals corresponding to individual subchannels received by a receiver 5 in the reception side are subjected to decoding of the most likelihood by a most likelihood decoder 6, and decoded data of the subchannel which has the largest likelihood function difference (LF) of likelihood functions or LFs calculated by decoding of the most likelihood is outputted to a synchronizing circuit 8 by a discriminator 7. The synchronizing circuit 8 extracts the clock timing to establish synchronism and monitors a frame signals, and the circuit 8 is transmits data to an output terminal when frame synchronism is estabilished.


Inventors:
FUJIWARA TOSHIYUKI
Application Number:
JP23693583A
Publication Date:
July 09, 1985
Filing Date:
December 15, 1983
Export Citation:
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Assignee:
JAPAN RADIO CO LTD
International Classes:
H04J4/00; H04J1/00; H04L5/06; H04L7/08; H04L25/08; (IPC1-7): H04J4/00



 
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