Title:
SYNCHRONOUS DEMODULATOR AND METHOD THEREFOR
Document Type and Number:
Japanese Patent JP3417342
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a synchronous demodulator that receives a time division multiple access signal capable of preventing interference waves which cause missing of a message, without the use of complicated control, and to provide its method.
SOLUTION: A changeover S/W 50 selects a level trigger (d) from a reception section 10 in an initial synchronizing state or selects a synchronizing trigger (e) from a synchronous counter 30 in a normal synchronizing state according to a mode signal (i) from a control counter 60 and gives the selected signal as a start trigger (f) to a processing section 40. The demodulator can directly detect a UW on the basis of a synchronizing timing, without the use of an AP gate because the demodulator detects directly unique word synchronously with a head of a time slot of a TDMA system, by using a synchronizing trigger synchronously with the clock in a received signal in the normal synchronizing state. When the processing section 40 cannot detect UW within a prescribed time in the normal synchronizing state, the processing section 40 is brought into initial synchronizing state.
Inventors:
Nobuaki Kubo
Application Number:
JP14338999A
Publication Date:
June 16, 2003
Filing Date:
May 24, 1999
Export Citation:
Assignee:
NEC
International Classes:
H04J3/06; H04J3/00; H04J3/04; H04L7/08; (IPC1-7): H04J3/06; H04J3/00; H04J3/04; H04L7/08
Domestic Patent References:
| JP6204961A | ||||
| JP9289499A | ||||
| JP10163949A | ||||
| JP11177544A |
Attorney, Agent or Firm:
Kaneyuki Matsuura
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