Title:
SYNCHRONOUS SYSTEM IN DIGITAL RADIO COMMUNICATION SYSTEM
Document Type and Number:
Japanese Patent JP2778442
Kind Code:
B2
Abstract:
PURPOSE: To reduce an arithmetic amount for establishing and maintaining synchronism by performing a slot synchronizing operation only in the case where out-of-slot synchronism is judged.
CONSTITUTION: A receiver performs a bit (or symbol) synchronizing operation and when the synchronism is established, a slot synchronizing signal 202 is detected but when the slot synchronism is established, a window 204 for detecting/monitoring a pilot symbol is set. Afterwards, at the window 204, it is monitored whether the pilot symbol is properly detected or not, namely, whether the slot synchronizing state is established (is continued) or not successively and continuously for each slot until the collated result is not matched. When the pilot symbol collated result is not matched and the non-detection of the pilot symbol is judged, out-of-slot synchronism is decided, the window monitor processing is stopped, series of operations from the previous slot synchronizing operation to window setting and window monitoring are performed again, and the slot synchronizing state is established again.
Inventors:
KUITA AKYOSHI
Application Number:
JP33527593A
Publication Date:
July 23, 1998
Filing Date:
December 28, 1993
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H04L27/38; H04J3/00; H04J3/06; H04L7/10; H04L27/22; (IPC1-7): H04L27/38; H04J3/00; H04J3/06; H04L7/10; H04L27/22
Domestic Patent References:
| JP2183641A | ||||
| JP61210735A | ||||
| JP314337A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)