PURPOSE: To eliminate the occurrence of access contention to a shared memory and, at the same time, to efficiently store a large amount of information in the memory.

CONSTITUTION: An information processor is provided with a main CPU 1 and a sub-CPU 2 used for reducing the load to the CPU 1 and a shared memory accessed by the CPUs 1 and 2 is constituted of four shared memories 3-6 having the same storage capacity. A bank switching circuit which switches the memories 3-6 accessed by the CPU 1 on the basis of an instruction A from the CPU 1 is provided and the CPU 1 can select and access one of the memories 3-6 by issuing the instruction A to the circuit. On the other hand, the CPU 2 can always access to all memories 3-6. Therefore, since the memory accessed by the CPU 1 can be switched by means of the circuit, the occurrence of access contention can be prevented and, at the same time, the CPU 1 can directly stores a large amount of information in a required area.