PURPOSE: To curtail the capacity of a vector memory by storing a vector data by a phase difference from a reference point and a signal value in the reference point at every access cycle period.
CONSTITUTION: A vector memory MV stores a vector data by a time series by using signal values (0, 1) of a reference point of an access cycle as an access cycle unit. A phase memory MP stores the vector data by a time series as an access cycle unit by using an access cycle varied from the reference point, as a phase difference. A phase circuit PCTL inputs a signal value of the vector data from the MV. The signal value is latched by latch registers SHT0Wn of a shift register SR. An SEL selects one of outputs of the SHTs0Wn by a phase difference data from the MP, and outputs it to an LSI chip CHP.
AOTSU HIROAKI
OISHI SHIRO
OKAZAKI YOSHINOBU
MORITA MASATO
