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Patent Searching and Data


Title:
SYSTEM FOR ENCIPHERING HIGH LEVEL DATA LINK CONTROL PROCEDURE FRAME
Document Type and Number:
Japanese Patent JPS63263849
Kind Code:
A
Abstract:

PURPOSE: To easily take the synchronism of a frame and to prevent information from being sent to a wrong destination, by providing a means to allocate an encipher key on a second-order station and a means which enciphers a field except a synchronizing sequence and a flag check sequence.

CONSTITUTION: After the encipher key being allocated on each second-order station, an address field, an information field, and a control field to be transmitted to each second-order station are enciphered separately by an enciphering means 2 based on an allocated encipher key. Furthermore, the flag check sequence(FCS) is attached on the information enciphered at the enciphering means 2 by an FCS attaching means 3. And in a case where five continuous (1) bits are included in the flag check sequence, (0) bits are attached behind the five continuous 1 bits by a code adjusting means 4. Finally, the synchronizing sequence is attached at the front and rear of the information obtained by the enciphering means 2, the FCS attaching means 3, and the code adjusting means 4.


Inventors:
NAGASAKA YASUSHI
Application Number:
JP9948687A
Publication Date:
October 31, 1988
Filing Date:
April 21, 1987
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04L9/08; H04L9/00; H04L9/12; (IPC1-7): H04L9/00
Attorney, Agent or Firm:
Naotaka Ide