Title:
SYSTEM MEMORY AND MICROCOMPUTER INCORPORATING THE SAME
Document Type and Number:
Japanese Patent JP3273068
Kind Code:
B2
Abstract:
PURPOSE: To arrange sensory devices in a memory space of certain capacity with high efficiency without any waste by freely arraying both read-only areas and write-only areas together in the memory space without any gap and overlap so that optional unit length is regarded as a minimum unit.
CONSTITUTION: All memory cells 313 which belong to row 317 are set so as to function as a ROM. All memory cells 313 which belong to row 318, on the other hand, are set so as to function as a RAM. This memory cell array has 32 rows, and each raw has 256B capacity. The ROM row 317 is arrayed on the memory cell array successively from the least significant digit row address, and the RAM row 318 is arranged on the memory cell array successively from the most significant digit address; and the border between the ROM row 317 and RAM row 318 can freely be set by programming. Consequently. the ROM capacity and RAM capacity can freely be set by using the constant unit length 256B as the minimum unit.
Inventors:
Makoto Ihara
Toshio Mitsumoto
Yukihiro Yoshida
Toshio Mitsumoto
Yukihiro Yoshida
Application Number:
JP32580892A
Publication Date:
April 08, 2002
Filing Date:
December 04, 1992
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G06F12/06; G06F15/78; G11C11/00; G11C11/401; G11C14/00; (IPC1-7): G11C14/00; G06F12/06; G06F15/78; G11C16/04; H01L27/10
Domestic Patent References:
| JP60146345A | ||||
| JP2214154A | ||||
| JP6353798A | ||||
| JP2278764A | ||||
| JP2138346U |
Attorney, Agent or Firm:
Haruyasu Sasaki (2 outside)