To prolong the life by performing increment by a flash memory and reducing erasure frequency.

A counter is implemented by using a method for minimizing bit transition from 1 to 50 and implemented by m+n bit. Bits of the counter are grouped into a binary section of an m-bit counter and a unary section of an n-bit counter. The unary section of the counter is first incremented and when the unary section reaches a specific value, the binary section of the counter is incremented. Thus, since the bit transition from 1 to 50 is restricted, unique values in a wide range is read from the counter.