Title:
SYSTEM AND METHOD FOR OBTAINING BIT ERROR FOR MASK WITHIN EYE DIAGRAM
Document Type and Number:
Japanese Patent JP2016123073
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a system and method for calculating a bit error rate for a mask within an eye diagram by using partial eye information.SOLUTION: For each time 505, 520 during the time duration of a mask 110, a minimum voltage 510, 525 and a maximum voltage 515, 530 of the mask 110 at that time 505, 520 are determined. The maximum bit error rate can be calculated for each time by integrating between those voltages 510, 515, 525, 530. The maximum bit error rate for all times during the time duration of the mask 110 can be selected as the maximum bit error rate for the mask 110.SELECTED DRAWING: Figure 5
Inventors:
RICHARD J POULO
Application Number:
JP2015207338A
Publication Date:
July 07, 2016
Filing Date:
October 21, 2015
Export Citation:
Assignee:
TEKTRONIX INC
International Classes:
H04L25/02; H04L1/00
Attorney, Agent or Firm:
Yamaguchi International Patent Office
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