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Title:
SYSTEM AND METHOD OF UPDATING DATA IN DUAL PORT MEMORY
Document Type and Number:
Japanese Patent JP2007018501
Kind Code:
A
Abstract:

To update data in DPM substantially at the same rate with a clock frequency of a dual port memory.

A comparator comprises an updating element in which a first port is used as output connected to the input of an updating element in a first clock, and a second port is used as input connected to the output of the updating element in a second clock, and a next address is accessed through the first port in the second clock, first input connected to the output of ADC in order to receive parameter values in the first clock, second input which receives the next receiving parameter values in the second clock, and output which supplies a match signal. The comparator enables the first port to be used as the input in the second clock by using the match signal. The data updated with the updating element in the first clock is supplied not in the second port but in the first port. They are supplied correctly in the input of the updating element in the second clock.


Inventors:
JOHNSTONE COLIN
Application Number:
JP2006135787A
Publication Date:
January 25, 2007
Filing Date:
May 15, 2006
Export Citation:
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Assignee:
AGILENT TECHNOLOGIES INC
International Classes:
G06F12/00; G01R19/25; G06F17/18; G11C7/10; H03M1/12
Attorney, Agent or Firm:
Shoichi Okuyama
Arihara Koichi
Matsushima Tetsuo



 
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