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Patent Searching and Data


Title:
SYSTEM MONITOR AND TESTING SYSTEM
Document Type and Number:
Japanese Patent JPS614352
Kind Code:
A
Abstract:

PURPOSE: To simplify a system by connecting a maintenance board to a channel system connecting part of a main controller and monitoring and testing the system through the channel system connecting part of the main controller from the maintenance board.

CONSTITUTION: The monitor indication from a maintenance board STC is transmitted to a management processor MPR through a maintenance board interface circuit CI and a pseudo network PNW. The management processor MPR transmits this monitor indication and required control information to a required call processor CPR through a channel coupling device CCA and requests transmitting-back of monitor information. The call processor CPR gathers monitor information of its own device and a corresponding channel device on a basis of received monitor indication and control information and transmits back these information to the management processor MPR through the channel coupling device CCA. The management processor MPR adds required control information to transmitted-back monitor information and transmits them to the maintenance board STC through the pseudo network PNW and the maintenance board interface circuit Ci. As the result, the maintenance board STC can monitor operation states of the call processor and the channel system device corresponding to the monitor indication.


Inventors:
TAKAHASHI ATSUHISA
TAKECHI HIROAKI
Application Number:
JP12577784A
Publication Date:
January 10, 1986
Filing Date:
June 19, 1984
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04M3/26; H04M3/22; H04Q1/20; (IPC1-7): H04M3/26; H04Q1/20
Attorney, Agent or Firm:
Sadaichi Igita