Title:
システム及びサーバ装置
Document Type and Number:
Japanese Patent JP7341963
Kind Code:
B2
Abstract:
According to one embodiment, a system includes a processor and a transmitter. The processor is configured to generate a first control signal including a first instruction to operate at least part of a terminal with in a first validity and generate a second control signal including a second instruction to operate at least part of the terminal within a second validity period after an operation of the at least part of the terminal in accordance with the first instruction. The transmitter is configured to transmit the first control signal to the terminal at first timing and transmit the second control signal to the terminal at second timing after the first timing. An end of the first validity period is after the second validity timing.
Inventors:
Tomoya Tandai
Toshihisa Nabeya
Koji Akita
Miyuki Ogura
Ayako Matsuo
Toshihisa Nabeya
Koji Akita
Miyuki Ogura
Ayako Matsuo
Application Number:
JP2020146839A
Publication Date:
September 11, 2023
Filing Date:
September 01, 2020
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G05D1/00; G05D1/02
Domestic Patent References:
| JP2020135320A |
Attorney, Agent or Firm:
Suzue International Patent Office
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