To provide a simulation device that realizes execution on an instruction set simulator (ISS) of a machine language program that is executable on a target system, when performing execution of a program in a hybrid manner by a host native and the ISS.

An instruction set simulator (ISS) 5 executes a target instruction set architecture (ISA) section 4 of a target program 10. A bus simulator 6 includes an address conversion table 7. When memory access is to be performed via a bus simulator 6 to global data by a target program 10 operating on the ISS 5, the ISS 5 acquires the address of the global data existing in an address space on a host computer 2, by using the address conversion table 7 and performs memory access to the global data on the host computer 2.