PURPOSE: To attain the address designation of a information accommodation buffer memory at the reception side by providing a register for sending the kind of transmission/reception information in a direct memory access DMA transfer seequence between processors.

CONSTITUTION: In applying DMA transfer between the 1st processor 1 and the 2nd processor 9, when the information to be sent is stored in a buffer memory 2, the processor 1 sets an address of the memory 2 to the 1st DMA section 5. That is, the address of the memory 2 is set as a transmission memory address and the number of transmission data is set to the DMA section 5. Then the kind of information is set to a register 8, an interruption is given to the processor 9 being the reception side via an interruption line 15 and the processor 9 reads the kind of information from the register 8. Then a buffer memory corresponding to the kind of information is obtained from buffer memories 10W12 at the processor 9 and the information storage buffer memory address at the reception side is designated.