Title:
データ検出器フィードバックループにおいて遅延を軽減するためのシステム及び方法
Document Type and Number:
Japanese Patent JP5173021
Kind Code:
B2
Abstract:
Methods and systems for mitigating latency in a data detector feedback loop are included. For example, a method for reducing latency in an error corrected data retrieval system is included. The method includes performing an analog to digital conversion at a sampling instant to create a digital sample, and performing a data detection on the digital sample to create a detected output. The detected output is compared with the digital sample to determine a phase error. During an interim period, the digital sample is adjusted to reflect the phase error to create an adjusted digital sample. After the interim period, the sampling instant is adjusted to reflect the phase error.
Inventors:
Nayak, Ratnaker, Aravind
Application Number:
JP2011510468A
Publication Date:
March 27, 2013
Filing Date:
May 19, 2008
Export Citation:
Assignee:
Agia Systems Incorporated
International Classes:
H03M1/12; H03M1/10; H03H17/00
Domestic Patent References:
| JP62242422A | ||||
| JP61094415A | ||||
| JP8130470A | ||||
| JP2007531415A |
Attorney, Agent or Firm:
Okabe
Nobuaki Kato
Asahi Shinmitsu
Katsumi Miyama
Nobuaki Kato
Asahi Shinmitsu
Katsumi Miyama
Previous Patent: JPS5173020
Next Patent: POLARIZING FILM FOR OUTDOOR LIQUID CRYSTAL DISPLAY APPARATUS
Next Patent: POLARIZING FILM FOR OUTDOOR LIQUID CRYSTAL DISPLAY APPARATUS