プロセッサ間通信のためのシステム、プロセッサ、装置および方法

Japanese Patent JP5498378

B2

A multi-processor system comprises a sending processor adapted to send a data message, a receiving processor adapted to receive the data message, and a memory unit associated with the receiving processor. The multi-processor system has a size-index table associated with the sending processor, and the sending processor is adapted to map a size of a payload portion of the data message to an index of the size-index table, and to send the data message containing the size, the index and the payload portion to the receiving processor. The multi-processor system also has mapping circuitry associated with the receiving processor. The mapping circuitry is adapted to map the index contained in the data message received from the sending processor to a pointer, wherein the pointer is associated with a buffer of the memory unit. The receiving processor is adapted to write the payload portion of the received data message to the buffer as indicated by the pointer. A receiving processor adapted to be comprised in a multi-processor system, an electronic apparatus comprising a multi-processor system and/or a receiving processor are also described as well as a method of receiving a data message at a processor.

Auberg, patrick

JP2010513947A

May 21, 2014

June 27, 2008

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Telefon Akti Bora Get Elm Ericson (Pubble)

G06F15/17; G06F13/28; G06F15/167

JP2005328119A
JP2002209234A
JP63124645A

US7003597
US6088777
US20020085551
US20040042490
US6208650

Miaki Kametani
Tetsuo Kanamoto
Koji Hagiwara
Kazuki Matsumoto

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