To provide a systolic FIR filter that performs a filter operation with many taps without requiring an increased circuit scale.

The systolic FIR filter comprising arrayed processing elements each having a multiplier and an adder includes: a multiplexer section for selectively feeding back an output of the processing element of a final stage as an input to be added to the processing unit of an initial stage; filter coefficient supply sections for supplying filter coefficients to the processing elements, respectively; and a timing controller section for controlling the filter coefficients supplied by the filter coefficient supply sections to the processing elements, respectively, the selection action of the multiplexer section, and input data input into the processing element of the initial stage as a quantity to be multiplied by the filter coefficient, in every operation unit in accordance with the number of taps of a filter operation and the number of processing elements.