Title:
ＴＦＴアレイ基板及びその製造方法、表示装置
Document Type and Number:
Japanese Patent JP6896627
Kind Code:
B2
Abstract:
A TFT array substrate, a method for manufacturing the same, and a display device including such TFT array substrate are disclosed. The TFT array substrate includes a base substrate (100); and two thin film transistors located on the base substrate. The two thin film transistors each includes an active layer (102, 107) having a source region and a drain region, the two active layers of the two thin film transistors are superposed with each other in a direction perpendicular to the base substrate. The drain region of one of the two active layers is electrically connected to the source region of the other one of the two active layers so that the two thin film transistors are connected in series. Thus, it is possible to reduce or save an area occupied by each thin film transistor on the substrate while maintaining a total effective channel length constant, thereby facilitating a high resolution design of a display panel.
Inventors:
Liu Masa
Application Number:
JP2017531238A
Publication Date:
June 30, 2021
Filing Date:
June 06, 2016
Export Citation:
Assignee:
BOE TECHNOLOGY GROUP CO.,LTD.
International Classes:
H01L29/786; G09F9/00; G09F9/30; H01L21/336; H01L21/77
Domestic Patent References:
| JP8148693A | ||||
| JP2013138191A | ||||
| JP6291269A |
Attorney, Agent or Firm:
Yasuhiko Murayama
Shinya Mitsuhiro
Shinya Mitsuhiro