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Title:
ICチップ貼り合わせ用TOC用構造体
Document Type and Number:
Japanese Patent JP5092284
Kind Code:
B2
Abstract:

To lighten, thin and downsize a TCP structure for laminating an IC chip, thereby achieving a light, thin and compact semiconductor package.

The TCP structure 10 has a frame shape having an opening 6 in its center, and a structure with a die-attach agent layer 5, a polyimide insulating layer 1, a conductive layer 2 with a wiring circuit and an input/output terminal formed, and a solder resist layer 3, laminated in this order. The thickness of the die-attach agent layer 5 is 5 to 25 μm, the thickness of the polyimide insulating layer 1 is 10 to 40 μm, the thickness of the conductive layer 2 is 5 to 15 μm. The thickness of the solder resist layer 3 is 5 to 20 μm as a laminate for laminating IC chip, and the thickness of the TCP structure 10 for laminating the IC chip is formed in conformity to the thickness of the IC chip 11.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
Tadakatsu Ota
Meiraku Yasutaka
Application Number:
JP2006151499A
Publication Date:
December 05, 2012
Filing Date:
May 31, 2006
Export Citation:
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Assignee:
Toppan Printing Co., Ltd.
International Classes:
H01L21/60; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
JP2002217354A
JP2005086098A



 
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