Title:
TECHNIQUE FOR EXECUTING ATOMIC COMPARE AND SWAP COMMAND OF CELL PROCESSOR USING SPECIFIC SPE
Document Type and Number:
Japanese Patent JP2007157142
Kind Code:
A
Abstract:
To provide a technique for executing an atomic compare and swap command in a CELL processor with different sized register lines for PPE and SPE.
Atomic CAS (compare and swap) processing is implemented on a processor system having a power processor element (PPE) and a synergistic processor element (SPE). The PPE and SPE have different memory transfer capacities. The PPE instructs execution of CAS processing for an address of a main memory to the SPE. The address size is less than or equal to a maximum memory transfer size of the SPE, and larger than a maximum memory transfer size of the PPE. The SPE atomically executes the CAS processing and reports the result of CAS processing to the PPE.
Inventors:
MARR JAMES E
BATES JOHN P
BATES JOHN P
Application Number:
JP2006323851A
Publication Date:
June 21, 2007
Filing Date:
November 30, 2006
Export Citation:
Assignee:
SONY COMPUTER ENTERTAINMENT INC
International Classes:
G06F9/52
Attorney, Agent or Firm:
Sakaki Morishita