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Patent Searching and Data


Title:
TELOP DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH02125598
Kind Code:
A
Abstract:
PURPOSE:To observe a received telop while extracting it again by digitizing an analog video signal, retarding it with a frame memory, constituting a storage device for a signal comprising a RAM and detecting and storing the telop. CONSTITUTION:A received television video signal is inputted from an input terminal 9, converted into a digital signal by an A/D converter 1 and a signal by one pattern of television video signal is written and stored in a 2-frame memory 2. The telop appearing next takes a location retarded horizontally. Thus, the memory signal is delayed by a delay circuit 3. The video signal from the A/D converter 1 and the video signal delayed by the delay circuit 3 are subjected to subtraction by a subtractor 4. The result of difference by the subtractor 4 is subjected to absolute value detection by an absolute value signal detection circuit 5. When the output of the absolute value detection circuit 5 is a prescribed level or below, the switch circuit 6 is controlled to be turned on and the signal from the 2-frame memory is outputted as the telop signal. The output value of the frame memory 2 is the content of the telop and stored in a RAM 7.

Inventors:
NOJI SHOZO
Application Number:
JP27971488A
Publication Date:
May 14, 1990
Filing Date:
November 04, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04N5/45; H04N17/00; (IPC1-7): H04N5/45; H04N17/00
Attorney, Agent or Firm:
Shin Uchihara