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Title:
不揮発性半導体装置及びその負荷抵抗の温度補償回路
Document Type and Number:
Japanese Patent JP5134522
Kind Code:
B2
Abstract:

To provide a highly reliable and large-scale nonvolatile semiconductor memory device including a variable resistance element changed in resistance characteristics by voltage application and capable of performing highly accurate and stable resistance control.

The nonvolatile semiconductor memory device is provided with a memory cell array 11 including a plurality of memory cells having variable resistance elements 21 arrayed, a load circuit 14 serially connected to ends of the variable resistance elements 21, a voltage generation circuit 17 for generating a voltage to be applied to both ends of the serial circuit of the variable resistance element 21 and the load circuit 14, a temperature detection circuit 25 for detecting the temperature of the load circuit 14, and a voltage conversion control circuit 26. The voltage conversion control circuit 26 is configured to control resistance characteristics of the load circuit 14 with respect to a temperature change according to the detected temperature of the temperature detection circuit 25.

COPYRIGHT: (C)2010,JPO&INPIT


Inventors:
Takashi Nakano
Application Number:
JP2008320139A
Publication Date:
January 30, 2013
Filing Date:
December 16, 2008
Export Citation:
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Assignee:
Sharp Corporation
International Classes:
G11C13/00
Domestic Patent References:
JP2008147343A
JP2007188603A
Foreign References:
WO2008120480A1
WO2007034542A1
Attorney, Agent or Firm:
Yoshifumi Masaki



 
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