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Patent Searching and Data


Title:
TERMINAL OF MULTIPLE TRANSMITTER
Document Type and Number:
Japanese Patent JPS6177346
Kind Code:
A
Abstract:

PURPOSE: To contrive the MT-conversion and miniaturization of the terminal main body and the cost reduction by a method wherein an LSI, a variety of circuit elements, and address setting switch are mounted on a piece of print board, and pat of DIL terminals are made as mode switch terminals, then the cover having a window is filled with filler.

CONSTITUTION: Besides an LSI 2 which constitutes a signal processing logic circuit A, I/O circuits B and C for this circuit A, a power source circuit D, circuit elements 3... constituting peripheral circuits such as a mode setting circuit F and a signal input circuit E, and an address setting switch 4 are mounted on the print board 1. Besides, DIL terminals 5... are projected out of this print board 1: these DIL terminals are I/O terminals of the terminal and mode switch terminals to adapt the circuits on this print board 1 for a various kind of terminals. A print board 1 with a construction of circuits as above-mentioned is provided with a cover 7 having a window 6 through which only 6 the top operation part of the switch 4 is exposed, and this cover 7 is filled with a suitable filler and molded.


Inventors:
MASUDA TOSHIYUKI
Application Number:
JP19994184A
Publication Date:
April 19, 1986
Filing Date:
September 25, 1984
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
H04Q9/00; H01L23/28; H05K3/28; H05K5/00; H05K5/06; (IPC1-7): H01L23/28; H04L11/00; H04Q9/00
Domestic Patent References:
JPS58140642U1983-09-21
Attorney, Agent or Firm:
Ishida Choshichi