PURPOSE: To obtain a test circuit for a semiconductor apparatus wherein the inner state of a second logic circuit is not changed during setting of the test data by always making the data input to the second logic circuit valid.

CONSTITUTION: In the general mode, a selecting circuit 13 selects an output of a first logic circuit in accordance with a second control signal, which is held in a holding circuit 14 with the timing of a third control signal. An output of the holding circuit 14 becomes an input to a second logic circuit 15. In this case, the output of the holding circuit 14 is changed because of storing of test data. Therefore, the inner state of the second logic circuit which has the output of the holding circuit 14 as its input is changed to a next state when the test data is stored. Accordingly, even during setting of the test data, invalid data is never taken into the holding circuit.