To provide a test circuit and a circuit testing method, which can perform the test for all clock cycles without omission, without decreasing the operational clock frequency.

The test circuit 100 performs the test of the circuit to be tested, and outputs the test result for a tester. The test circuit 100 is provided with a first clock generator 101, a second clock generator 102, the circuit 103 to be tested, a built-in self test circuit 104 for performing the test, and a tester synchronization circuit 105. The self test circuit 100 repeats the test by the number of times determined by a first operational clock and a second operational clock, and selects and outputs the determination results so that all of the determination results of the test from the self test circuit 104 are outputted. According to such constitution, the test for all clock cycles can be performed without omission, without decreasing the operational clock frequency.