Title:
パワー半導体用試験方法およびパワー半導体用試験装置
Document Type and Number:
Japanese Patent JP7367505
Kind Code:
B2
Abstract:
To conduct an avalanche test and a recovery test by one circuit which is integrated without using a switch for breaking.SOLUTION: In an avalanche test, a voltage V1 of a first power source 20 is applied to a drain terminal of a DUT 10 through a switch 22 and an inductor 23, and the DUT 10 is brought under turn-on and turn-off control. At this time, a MOSFET 26 for switch is brought under turn-off control, and a voltage V2 of a second power source 24 which is higher than the voltage V1 is applied to a drain terminal of the MOSFET 26 for switch. A body diode 26a of the MOSFET 26 for switch is reversely biased, so avalanche energy never flows in a capacitor 25, and is all consumed by the DUT 10. In a recovery test, the MOSFET 26 for switch is brought under turn-on and turn-off control with the inductor 23 connected in parallel to the DUT 10 under the turn-off control.SELECTED DRAWING: Figure 1
Inventors:
Shinji Kusakari
Application Number:
JP2019223630A
Publication Date:
October 24, 2023
Filing Date:
December 11, 2019
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
G01R31/26
Domestic Patent References:
| JP2021032827A |
Foreign References:
| WO2018092457A1 |
Attorney, Agent or Firm:
Patent Attorney Corporation Fuso International Patent Office
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