PURPOSE: To enable detection of short-circuit defects in resistance between word lines in a semiconductor memory.

CONSTITUTION: Suppose word lines 1 and 2 are short-circuited at a resistance 44. After zero is written in all memory cells as the initialization, assuming that the cell where a data destruction occurs is 50; first, the word line 1 and bit lines 21, 22 are selected, and that the data read out from the cell 50 is zero is confirmed. Next, the word line 3 is selected, and the word lines 1 and 2 are put in an unselected state. Thus, a holding current 1st flowing to the standby current source of the cell 50 that is connected to the word lines 1 and 2 is reduced, and the holding characteristic of the cell 50 becomes unstable. When the word line 2 is selected in this state and one is written in the cell 51, the word line 1 is also selected through the resistance 44 and one is erroneously written in the cell 50. Finally, the word line 1 is selected, and the change in the state of the cell 50 is detected by a read-out operation.