Title:
TEST SYSTEM FOR ANALOGUE/DIGITAL HYBRID IC
Document Type and Number:
Japanese Patent JP2002243808
Kind Code:
A
Abstract:
To provide a test system for analogue/digital hybrid ICs capable of and operating an analogue test system and a logic test system by accurate synchronization.
The test system for the analogue/digital hybrid ICs is provided with the logic test system and the analogue test system and controls both of them by a main program. The main program comprises a pattern generating program used for a logic test, and a description for generating a control signal for the analogue test system is added to part of the pattern generating program.
Inventors:
MIURA TOSHIYUKI
Application Number:
JP2001033953A
Publication Date:
August 28, 2002
Filing Date:
February 09, 2001
Export Citation:
Assignee:
ADVANTEST CORP
International Classes:
G01R31/28; G01R31/3167; G01R31/3183; G01R31/319; G01R31/316; (IPC1-7): G01R31/316; G01R31/28; G01R31/3183
Domestic Patent References:
JPH05107307A | 1993-04-27 | |||
JPH05203702A | 1993-08-10 | |||
JPH06167542A | 1994-06-14 | |||
JPH09189750A | 1997-07-22 | |||
JPH0436671A | 1992-02-06 | |||
JPH0882655A | 1996-03-26 | |||
JPH0371099U | 1991-07-17 |
Attorney, Agent or Firm:
Kusano Taku (1 person outside)