PURPOSE: To improve the precision of test by providing a retrigger circuit dis criminating it to be a detection fault in the case of its input in excess of a prescribed value and giving a trigger signal to a latch circuit to the test device.

CONSTITUTION: A retrigger circuit 35 is added to a logic circuit 30a, in which its input terminal connects to a digital signal comparating arithmetic circuit 32 and its output terminal connects to a latch circuit 23. In this case, when a measured signal Di in a latch circuit 23 at a point of time tm of a low speed clock signal is discontinuous with a measured signal Di-1 of a preceding digital step i-1 and a difference output of the circuit 32 represents a fault value, no oscillation control signal OC is outputted and the retrigger circuit 35 discriminates the signal to be a fault signal in excess of a prescribed value. Then a trigger signal Pt with a shorter period τt than that of a low speed clock signal CL is arisen at a point of time tt and given to the latch circuit 23, and the latch circuit 23 accurately latches the signal level of a detection signal DD1 at the point of time tt again. Thus, the testing instrument for the A/D converter is realized.