PURPOSE: To set a reference for deciding well-definedly whether a result of test is good or not, by generating and converting a binary digital pattern signal for a test use, inputting it to a device to be tested, and collating a digital output signal of the device to be tested, with the generated digital pattern signal.
CONSTITUTION: A binary digital pattern signal generated by a pattern generating circuit 3 in a pattern collation testing device 1 is modulated in order to interface with a facsimile signal processor 2, in a bipolar signal converting circuit 4 and a modulating circuit 5. This modulated pattern signal is demodulated by a demodulating circuit 9, passes through a full-wave rectifying circuit 10 and a binary-coding circuit 11, becomes a binary-coded analog signal similar to its original digital pattern, and becomes its binary digital pattern signal by a sampling circuit 12. Subsequently, this signal is encoded by a modified Huffman encoding circuit 15, and also is decoded by a modified Huffman decoding circuit 21.
TAKIZAWA NORIO
TAKASHIMA HIROSHI
TSUNODA TOSHIHIKO
NIPPON ELECTRIC CO
FUJITSU LTD
| JPS5046464A | 1975-04-25 | |||
| JPS5056838A | 1975-05-17 |