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Title:
TESTING METHOD OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5611370
Kind Code:
A
Abstract:

PURPOSE: To prevent corrosion of sockets and conductors for bias voltge applying in the PCB test to make the humidity-proof property appreciating method of semiconductor devices efficient, by performing the PCB test after performing the PCS test for a prescribed time.

CONSTITUTION: In the PCS test, a semiconductor device is stored in arbitrary vessel 2 and is held in pressure cooker (PC) vessel 3 for a prescribed time. In the PCB test, semiconductor device 1 is held in PC vessel 3 for a prescribed time while applying a bias voltage from bias terminal to semiconductor device 1 through conductor 4. In this PCB test, conductor 4 and the socket are corroded because they are exposed to PC conditions for a long time. However, applying of the bias voltage does not influence corrosion of semiconductor device 1 until water invades from the external to reach the semiconductor chip. Consequently, conductor 4 and the socket are not exposed to the corrodent atmosphere for a long time by performing the PCB test after performing the PCS test for a prescribed time, and thus, the humidity-proof property can be appreciated efficiently.


Inventors:
IWAMORI KIYOSHI
Application Number:
JP8761779A
Publication Date:
February 04, 1981
Filing Date:
July 09, 1979
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G01R31/26; H01L21/66; (IPC1-7): G01R31/26; H01L21/66



 
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