To shorten testing time and reduce testing cost.

Resistors R1, R2 having the same magnitude are connected in series between output terminals of a differential output circuit. In addition, a common connection node C thereof is connected to a terminating voltage terminal 31 through a resistor R3 having the same magnitude. In testing a voltage having the same magnitude, a voltage source transistor MP1 and a current source I1 are operated to control transistors MN1 to MN4, so that a logic between nodes P, M is controlled to be in an "H" or "L" state and it is determined whether or not a voltage generated at the node C is within the range of an upper-limit in-phase standard voltage and a lower-limit in-phase standard voltage. In testing a differential voltage, the testing state of the in-phase voltage is controlled to be such a state that a voltage source transistor MP1 is inoperative, a known voltage is applied to the terminating voltage terminal 31 and it is determined whether or not a voltage generated at the node C is within the range of voltages of an upper limit and an low limit in which a voltage generated at the node C is determined.