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Title:
THIN FILM TRANSISTOR FERROELECTRIC RANDOM ACCESS MEMORY AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH10209388
Kind Code:
A
Abstract:

To provide a highly integrated FRAM in a simple structure.

A plurality of TFTs are arranged on the upper part of a ferroelectric capacitor which is provided with respectively and integrally formed lower electrode 1 and a ferroelectric layer 2 and a plurality of upper electrodes 3. The plurality of TFTs are provided respectively corresponding to the upper electrodes 3. Insulator layers 4a are further provided on the upper electrodes 3 so as to leave windows for bringing the TFTs into contact with the upper electrodes 3 to form the TFTs on the insulator layers 4a and exposed upper electrodes 3. Besides, ground pads are formed between the plurality of upper electrodes 3 on the ferroelectric layer 2 to discharge the charge generated by the pyroelectric effect on the surface of the ferroelectric layer. In such a constitution, it is recommended that the lower and upper electrodes 1, 3 are formed of ceramics especially RuOx.


Inventors:
RYU INKEI
TEI ICHISHO
Application Number:
JP35157797A
Publication Date:
August 07, 1998
Filing Date:
December 19, 1997
Export Citation:
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Assignee:
SAMSUNG ELECTRONIC
International Classes:
H01L21/8247; H01L21/8242; H01L21/8246; H01L27/10; H01L27/105; H01L27/108; H01L29/786; H01L29/788; H01L29/792; (IPC1-7): H01L27/10; H01L27/108; H01L21/8242; H01L21/8247; H01L29/788; H01L29/792; H01L29/786
Attorney, Agent or Firm:
Yukio Ono (1 person outside)