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Patent Searching and Data


Title:
THIN-FILM TRANSISTOR AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPS63190385
Kind Code:
A
Abstract:

PURPOSE: To prevent short-circuiting defects by a method wherein the shoulders of a source electrode and drain electrode are tapered so that electric field concentration, which is to exist in the presence of a sharp edge, may be eliminated.

CONSTITUTION: A source electrode S and drain electrode D are built of a laminate of such a doped semiconductor film 12 as an n+ a-Si film and such a conductive film 13 as a Ti film. Further, the doped semiconductor film 12 is larger than the conductive film 13 positioned thereon. Accordingly, a working semiconductor layer 14 and a gate insulating film 15, which are formed on the laminate, will spread conformable to the contour of the laminate and, therefore, there will be no break in them and, because there exists no sharp edge, no electric field concentration will occur. Such a laminate may be produced with facility when a doped semiconductor film 12 and a conductive film 13 formed on an insulating substrate 11 are successively subjected to a selective taper etching process. This design prevents short-circuiting defects.


Inventors:
KAWAI SATORU
MATSUMOTO TOMOTAKA
NASU YASUHIRO
ICHIMURA TERUHIKO
TATSUOKA KOICHI
Application Number:
JP2291387A
Publication Date:
August 05, 1988
Filing Date:
February 02, 1987
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G09F9/30; G02F1/136; G02F1/1368; H01L21/336; H01L27/12; H01L29/423; H01L29/45; H01L29/49; H01L29/78; H01L29/786; (IPC1-7): G09F9/30; H01L27/12; H01L29/78
Attorney, Agent or Firm:
Sadaichi Igita