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Patent Searching and Data


Title:
THIN FILM TRANSISTOR MEMORY
Document Type and Number:
Japanese Patent JPH03290974
Kind Code:
A
Abstract:

PURPOSE: To enable execution of stable writing, erasure and reading and also to increase component density and to facilitate manufacture by constructing a thin film transistor for a memory and a thin film transistor for selection in lamination and by preventing the effect of a gate voltage.

CONSTITUTION: A thin film transistor TrT20 for selection is constructed in lamination on a thin film TrT10 for a memory which is constructed by laminating a lower gate electrode G10, a lower gate insulation film 13, a semiconductor layer 14 and source and drain electrodes S and D. In this case, the TrT20 is so constructed that an upper gate electrode G20 and an upper gate insulation film 16 are laminated and that the layer 14 and the electrodes S and D are shared. The film 13 is formed on a flattening insulation film 12 and the electrode G20 is formed to be opposite to the whole of the layer 14, while the film thickness of the film 16 is made large on the part of the layer 14 corresponding to a memory area. Accordingly, a malfunction due to the effect of a gate voltage impressed on the electrode G10 and the electrode G20 is eliminated and execution of stable writing, erasure and reading is enabled. Besides, component density is increased and easy manufacture can be realized by a reduced number of processes.


Inventors:
MATSUMOTO HIROSHI
NAITO HIDEO
YAMAMURA NOBUYUKI
Application Number:
JP9202590A
Publication Date:
December 20, 1991
Filing Date:
April 09, 1990
Export Citation:
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Assignee:
CASIO COMPUTER CO LTD
International Classes:
H01L21/8247; H01L27/115; H01L29/78; H01L29/786; H01L29/788; H01L29/792; (IPC1-7): H01L27/115; H01L29/784; H01L29/788; H01L29/792