Title:
薄膜トランジスタ基板およびその製造方法
Document Type and Number:
Japanese Patent JP5717546
Kind Code:
B2
Abstract:
Provided is a thin film transistor having a semiconductor film disposed in a plurality of portions on a substrate, a source electrode and a drain electrode which are disposed, on a semiconductor film, in contact with the semiconductor film while being spaced from each other, and a gate electrode which is disposed across the source electrode and the drain electrode via a gate insulating film; an auxiliary capacitance electrode which is disposed on the semiconductor film while in contact with the semiconductor film; a source line which has the semiconductor film in a lower layer, extends from the source electrode; a gate line which extends from the gate electrode; a pixel electrode which is electrically connected to the drain electrode; and an auxiliary capacitance electrode connecting line which electrically connects the auxiliary capacitance electrodes to each other in the adjacent pixels.
Inventors:
Toshihiko Iwasaka
Inoue Japanese style
Osamu Aoki
Noguchi Reiko
Inoue Japanese style
Osamu Aoki
Noguchi Reiko
Application Number:
JP2011123612A
Publication Date:
May 13, 2015
Filing Date:
June 01, 2011
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
G09F9/30; G02F1/1368; G09F9/00; H01L21/28; H01L21/3205; H01L21/3213; H01L21/336; H01L21/768; H01L23/532; H01L29/417; H01L29/786
Domestic Patent References:
| JP2010232651A | ||||
| JP2011049549A | ||||
| JP2011054942A | ||||
| JP2009098336A | ||||
| JP2010060683A | ||||
| JP8271930A |
Foreign References:
| WO2009022503A1 |
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Takahiro Arita