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Title:
THIN-FILM TRANSISTOR
Document Type and Number:
Japanese Patent JPH02103519
Kind Code:
A
Abstract:
PURPOSE:To control the threshold voltage over a wide range by doping at a high concn. without degrading an ON characteristic by forming the active layer of a channel part into a two-layered structure consisting of a non-doped semiconductor layer and a doped semiconductor layer and forming the active layer of a channel part in such a manner that the doped semiconductor layer does not exist between the source-drain electrode and the non-doped semiconductor layer. CONSTITUTION:The source electrode S and the drain electrode D are directly formed on the non-doped semiconductor layer 3 and the doped semiconductor 4 is brought into contact with the top of channel part 8 of the non-doped semiconductor layer 3 and the end thereof is formed as to extend on the source electrode S and the drain electrode D, by which the thin-film transistor is constituted. The junction of the n<+>a-Si layer and the doped semiconductor layer 4 is, therefore, not formed between the source-drain electrode and the channel and the junction of the non-doped semiconductor layer 4 and the n<+>a-Si layer 6 is eventually directly formed therebetween. The generation of a barrier is thus not obviated. The deterioration of the on-current characteristic is obviated even if the concn. of the doped semiconductor layer 4 is increased. In addition, the sufficiently high threshold voltage is obtd. by the doped semiconductor layer 4 formed on the non-doped semiconductor layer 3 of the channel part 8.

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Inventors:
OKI KENICHI
MATSUMOTO TOMOTAKA
YANAI KENICHI
OKAWA YASUSHI
MISHIMA YASUYOSHI
Application Number:
JP25922988A
Publication Date:
April 16, 1990
Filing Date:
October 13, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G02F1/136; G02F1/1368; H01L29/78; H01L29/786; (IPC1-7): G02F1/136; H01L29/784
Attorney, Agent or Firm:
Sadaichi Igita



 
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