バッファ層を備えるウエハからの薄層の転移

Japanese Patent JP2005532688

A

A method for transferring a layer of semiconductor material from a wafer is described. The wafer includes a support substrate and an upper surface that includes a buffer layer of a material having a first lattice parameter. In an embodiment, the technique includes growing a strained layer on the buffer layer. The strained layer is made of a semiconductor material having a nominal lattice parameter that is substantially different from the first lattice parameter, and it is grown to a thickness that is sufficiently thin to avoid relaxation of the strain therein. The method also includes growing a relaxed layer on the strained layer. The relaxed layer is made of silicon and has a concentration of at least one other semiconductor material that has a nominal lattice parameter that is substantially identical to the first lattice parameter. The technique also includes providing a weakened zone in the buffer layer, and supplying energy to detach a structure at the weakened zone. The structure includes a portion of the buffer layer, the strained layer and the relaxed layer. Lastly; the method includes enriching the concentration of the at least one other semiconductor material in the relaxed layer of the structure.

Bruno, Gislen
Cecile, Ornet
Benedict, Osterno

JP2004519128A

October 27, 2005

July 09, 2003

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S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES

H01L21/02; H01L21/20; H01L21/762; H01L27/12; (IPC1-7): H01L21/20; H01L21/02

JP2001217430A	2001-08-10
JP2001284558A	2001-10-12
JP2001217433A	2001-08-10
JPH10308503A	1998-11-17
JP2000030995A	2000-01-28
JP2002503400A	2002-01-29

WO2002015244A2	2002-02-21
WO2001011930A2	2001-02-15
US6323108B1	2001-11-27

Kenji Yoshitake
Masami Tamama
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki

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