Title:
THREE-DIMENSIONAL SEMICONDUCTOR DEVICE, OPERATION METHOD OF THE SAME, AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2014135492
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide: a three-dimensional semiconductor device having an increased degree of integration; an operation method of the three-dimensional semiconductor device; and a semiconductor device.SOLUTION: A three-dimensional semiconductor device according to the present invention includes: first and second selection lines stacked in order; an upper line horizontally crossing the first and second selection lines; and first and second vertical patterns connected in common to the upper line while vertically crossing the first and second selection lines. Each of the first and second vertical patterns constitutes first and second selection transistors that are connected in series to each other, while the first and second selection transistors respectively have first and second threshold voltages that are different from each other, and the first selection transistors of the first and second vertical patterns are controlled by the first and second selection lines, respectively.
Inventors:
LEE CHANG-HYUN
HWANG SUNG-MIN
HWANG SUNG-MIN
Application Number:
JP2014003402A
Publication Date:
July 24, 2014
Filing Date:
January 10, 2014
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
H01L27/115; H01L21/336; H01L21/8234; H01L21/8236; H01L21/8247; H01L27/088; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Kyosei International Patent Office