Title:
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME
Document Type and Number:
Japanese Patent JP2018182319
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device in which an integration degree is more improved.SOLUTION: A three-dimensional semiconductor memory device and a manufacturing method are provided. The three-dimensional semiconductor memory device includes: a substrate having a peripheral circuit region and a cell allay region; an electrode structure having a plural number of electrodes vertically laminated on the substrate of the cell allay region; a peripheral side logic circuit provided onto the substrate of the peripheral side circuit region and having a first impure material region having a first impure material doped in the substrate; a peripheral side contact plug connected to the first impure material region; and a second impure material region interposed between the first impure material region and the peripheral side contact plug and having a second impure material doped in the first impure material region.SELECTED DRAWING: Figure 2J
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Inventors:
LEE TAE-HEE
LEE JUYEON
HWANG JEEHOON
LEE JUYEON
HWANG JEEHOON
Application Number:
JP2018074159A
Publication Date:
November 15, 2018
Filing Date:
April 06, 2018
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
H01L27/11556; H01L21/336; H01L21/8239; H01L27/105; H01L27/11526; H01L27/11573; H01L27/11582; H01L29/788; H01L29/792; H01L45/00; H01L49/00
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Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Shinsuke Onuki
Tadahiko Ito
Shinsuke Onuki