PURPOSE: To provide a three input arithmetic and logic device for forming the arithmetic and Boolean mix combination of three multiple bit input signals by providing first/second three input Boolean function generators and an adder for a data processor circuit.
CONSTITUTION: The first three input Boolean generator 403 has a first input receiving a first multiple bit input signal, a second input receiving a second multiple bit input signal, a third input for receiving a third multiple bit input signal and an output forming the first selected Boolean combination of the signals received in the first to third inputs. The second three input Boolean function generator 403 has a first input for receiving a second multiple beam input signal, a second input for receiving a third multiple bit input signal and output for forming the second selected Boolean combination of the signals which the first and second inputs receive. The adder 226 has first input connected to the output of the first generator 403, a second input connected to the output of the second generator 403 and output for forming the sum of the signals received in the inputs.
| JPH04250527 | ARITHMETIC CIRCUIT |
| JPH01501905 | [Title of the Invention] N bit sum total carry Accumulator |
| JPS59121541 | ACCUMULATING DEVICE |
RICHIYAADO SHINPUSON
BURENDAN UORUSHIYU
