To improve response to surge and enhance surge endurance.

This surge protecting element is provided with a first N-type semiconductor layer 11, which has a resistivity of 0.1-30 Ωcm and turns into a substrate, a second P-type semiconductor layer 12 and a third P-type semiconductor layer 13 which are exposed on both the main surfaces of the first semiconductor layer 11 and included in the layer 11, and electrodes 16, 17 formed on both the main surfaces of the layer 11. Here the thickness dSUB1 of the first semiconductor layer 11, sandwiched by the second semiconductor layer 12 and the third semiconductor layer 13, is set larger than the spread width of a depletion layer of holes in the second semiconductor layer 12 or the third semiconductor layer 13, in the first semiconductor layer 11 and is smaller than the diffusion length of the holes into the first semiconductor layer 11.