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Title:
TIME CONSTANT CIRCUIT
Document Type and Number:
Japanese Patent JPS6113814
Kind Code:
A
Abstract:

PURPOSE: To make the titled circuit suitable to monolithic integrated circuit constitution and to obtain a stable time constant by providing an inverse amplifier provided with the 1st power supply terminal and the 2nd power supply terminal, the 1st and 2nd capacitive elements, the 1st, 2nd and 3rd switch elements applied with switching control by the 1st, 2nd and 3rd control signals respectively and a level detector.

CONSTITUTION: The 1st control signal 11 turns on a transistor (TR)31 to increases the level at a terminal 7 to a VDD level. When a switch element 32 is turned on, an electric charge is distributed again to a capacitive element C4 and the level of the terminal 7 is decreased slightly. In turning on the switch element 3 further, an electric charge is discharged from the capacitive element C4 to a VSS terminal. The amount of charge discharged by one clock cycle is expressed as Qu=C2.VTH. The level fluctuation per clock cycle at an output 6 of the inverse amplifier 60 is ΔV=Qu/C1 and then the ΔV is expressed as ΔV=(C2/ C1).VTH. Since the gradient of the output level 6 is constant, the variance of the time constant due to the variance in the threshold value of the level detection circuit 40 is less.


Inventors:
HARUYAMA KIYUUICHI
Application Number:
JP13430284A
Publication Date:
January 22, 1986
Filing Date:
June 29, 1984
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03K17/28; H03K5/13; H03K5/135; H03K17/284; (IPC1-7): H03K5/13; H03K17/284
Domestic Patent References:
JPS58136136A1983-08-13
JPS4971858A1974-07-11
Attorney, Agent or Firm:
Uchihara Shin