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Patent Searching and Data


Title:
TIME DIVISION MULTIPLE ACCESS DEVICE
Document Type and Number:
Japanese Patent JPS60153641
Kind Code:
A
Abstract:

PURPOSE: To allow multiple address communication information to distribute by a time switch and to receive the distributed information by plural multiple address communication terminal devices by providing the time switch between a speed conversion buffer and the multiple address communication terminals to accommodate the plural multiple address terminal devices.

CONSTITUTION: A data burst signal from a satellite line 1 is demodulated through a demodulator-modulator 10, and applied to velocity conversion by the velocity conversion buffer 20 and after the result is inputted to a time switch 30, the signal is received to the multiple address communication terminal devices 50, 60 accommodated in the time switch 30. After the transmission data of the multiple address communication terminal devices 50, 60 is inputted to the time switch 30, the data is subject to velocity conversion by the velocity conversion buffer 20, modulated through he demodulator- modulator 10 and becomes the data burst signal, which is transmitted to a satellite line. A time switch control section 40 is the time switch control section controlling the time switch 30. When the data burst signal from the satellite line 1 is multiple address communication information to the multiple address communication terminal devices 50, 60, since the multiple address communication information is inputted to the time switch 30 in a form of a time division signal, it is possible for the time switch control section 40 to extract the time division signal into an optional path.


Inventors:
MOCHIKI HIROYUKI
Application Number:
JP1074584A
Publication Date:
August 13, 1985
Filing Date:
January 23, 1984
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04J3/00; H04B7/15; H04B7/212; (IPC1-7): H04J3/00
Attorney, Agent or Firm:
Naotaka Ide